In electronic circuits, there is often the need for a plurality of supply voltages. These supply voltages can be produced by a number of different methods, and one commonly used method is the use of a voltage divider circuit. The voltage divider circuit functions as a dc-to-dc converter to produce an output voltage which is lower in value than an input or primary supply voltage. Two important requirements for such a voltage divider circuit are; power handling capacity--sufficient to supply the dependent circuits, and conversion efficiency--to minimize overall power requirements.
Voltage divider circuits can be classified as either inductorless or inductor-based circuits. Inductor-based voltage divider circuits generally have high power handling capacity but have a lower conversion efficiency and consume significant power in their operation. The inductorless voltage divider circuits have high operating efficiency but are limited in their ability to produce an output voltage that is other than 1/n of the input or source voltage and these circuits also rely on extensive switching circuitry to produce the output voltage.
A typical inductorless voltage divider circuit is illustrated in an article entitled "New Switched-Capacitor Transformer and its Analysis" by T. Inoue et al published in Electronic Communication of Japan pp 30-38, February 1981. The Inoue, et al voltage divider uses n capacitors and (3n+1) electronic MOS-FET switches to realize a 1/n dc-to-dc converter. This is accomplished by connecting the n capacitors in series across the source voltage for a predetermined period of time. The output voltage is then generated by activating the MOS-FET switching circuitry to connect all n capacitors in parallel across the output terminals of the voltage divider circuit.
Another 1/n voltage divider circuit is illustrated in U.S Pat. No. 3,708,742 issued to J. B. Gunn. The Gunn voltage divider circuit operates in similar fashion to the Inoue et al circuit but uses output voltage levels rather than a predetermined clock cycle to control the switching frequency of the capacitors.